PLM Errors - 2023.2 English

Versal Adaptive SoC System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2023-10-18
Version
2023.2 English

When errors are detected during PDI load, the PLM writes the error code to the PLM error register (PMC_GLOBAL.PMC_FW_ERR) and sets the NCR bit in the register. For any PPU MB exceptions that occurred during boot PDI load or while processing any service request, the PLM sets the NCR bit along with the error code in error register.

The default response for the PLM NCR bit is set to SRST. This can be changed to other actions using error management commands as per your requirements. In JTAG boot mode, irrespective of the response selected, the PLM will be in while loop for any error to facilitate debugging of the system.

PLM error can be read from the PLM error register (PMC_GLBOAL.PMC_FW_ERR) or using the JTAG error_status command. The error is logged in the following format.

Error code: 0xXXXXYYYY 
XXXX
Major error code. The PLM/XilLoader/XPLMI error codes are defined in xplmi_status.h.
YYYY
Minor error code. This is the Libraries/Drivers error code defined in each module.