The gigabit Ethernet MAC (GEM) controller provides 10/100/1000 Mb/s interfacing (GbE) via an RGMII, GMII, or MII interface. There are two individual controllers located in the LPD with its DMA unit attached to the IOP AXI switch.
Each controller is operated independently and include a management data input/output (MDIO) interface for its external PHY for use with the RGMII interface. The I/O options include:
- RGMII (v2.0) is routed to the PMC or LPD MIO pins for connection to an external PHY
- GMII and MII are routed to the PL where they can be mapped to GTs or optionally be converted to other protocols using the PL logic
- Diagnostic internal loopback within each controller
Ethernet Specifications
The GEM controller implements several MAC layer specifications and time sensitive clauses.
- MAC layer
- IEEE 802-2001
- IEEE 802.3-2002
- IEEE 802.3-2008
- Time-sensitive network (TSN) clauses
- IEEE 802.1AS Timing and Synchronization for Time-Sensitive Applications
- IEEE 802.1Qav Credit-Based Shaper
- IEEE 802.1Qaz Enhanced Transmission Selection
- IEEE 802.1Qbv Enhancements for Scheduled Traffic
- IEEE 802.1Qci Pre-Stream Filtering and Policing
- Additional implementation:
- IEEE Std 1588 precision timestamp protocol
- IEEE Std 802.1Q VLAN
Note: All register references are to the
Versal Adaptive SoC Register Reference (AM012). However, the functionality is the
same.