The descriptor-driven, general purpose DMA unit versions are compared in the following table.
| Device Generation | Instances | DMA Core Design | Buffer | Flow Control Interface |
|---|---|---|---|---|
| UltraScale+ MPSoC | LPD and FPD | AMD IP, version 1.0 | LPD: 2 KB FPD: 4 KB |
DMA2PL_CACK |
| Versal device | LPD | AMD IP | 4 KB | New DMA2PL_CACK flow control signal behavior |
Note: In Versal devices, the PL must not use DMA2PL_CACK in combinational
logic to generate PL2DMA_CVLD because it can result in unpredictable operation. The
signal is shown in PL Flow-Control Interface.
Note: The LPD DMA is a PS DMA
controller that is also known as the ADMA and is implemented using the AMD ZDMA core.