When feeding the descriptor information on the bypass input interface, the user
logic can request the QDMA to send a status
write back to the host when it is done fetching the data from the host. The user logic
can also request that a status be issued to it when the DMA is done. These behaviors can
be controlled using the
mrkr_req inputs in the bypass input interface.
The H2C writeback status register is located after the last entry of the H2C descriptor list.
|Bit||Bit Width||Field Name||Description|
|[15:2]||14||reserved||Reserved (Producer Index)|
0x0 : No Error
0x1 : Descriptor or data error was encountered on this queue
0x2 and 0x3 : Reserved