IRQ Block User Interrupt Pending (0x48)

IRQ Block User Interrupt Pending (0x48) - 1.0 English

Versal ACAP DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID

PG344

Release Date

2022-05-20

Version

1.0 English

Table 1. IRQ Block User Interrupt Pending (0x48)
Bit Index	Default	Access Type	Description
[NUM_USR_INT-1:0]	‘h0	RO	user_int_pend User Interrupt Pending. This register indicates pending events. The pending events are cleared by removing the event cause condition at the source component.