Receive Clocks - 1.1 English

Versal ACAP Integrated 600G Interlaken with FEC Subsystem Product Guide (PG371)

Document ID
PG371
Release Date
2022-07-21
Version
1.1 English

The receive clocks in the ILKNF subsystem are as follows.

rx_serdes_clk[5:0]
Recovered clocks of RX transceiver lanes. For RX lanes configured in Interlaken mode, rx_serdes_clk[0] is used as the transceiver clock. For RX lanes configured in FEC-only mode, rx_serdes_clk[0] is used for both 50G slices of FEC instance 0, rx_serdes_clk[1] is used for both 50G slices of FEC instance 1, and so on.
rx_alt_serdes_clk[5:0]
RX SerDes alternative clocks. For RX lanes configured in Interlaken mode, rx_alt_serdes_clk[0] is used as the alternative transceiver clock. For RX lanes configured in FEC-only mode, rx_alt_serdes_clk[0] is used for both 50G slices of FEC instance 0, rx_alt_serdes_clk[1] is used for both 50G slices of FEC instance 1, and so on. When used, the frequency of rx_alt_serdes_clk[i] is half of rx_serdes_clk[i], i=0 to 5.