The following diagrams show several representative TX transactions on the FEC-only interface. On the databus, the subscript attached to the CW text is a representation of the codeword sequence number.
The 100 Gb/s diagrams show only the first FEC instance, however, they are representative of the behavior for all FEC instances. The 50 Gb/s diagrams show only the first slice of the first FEC instance, however, they are representative of the behavior for all FEC slices of all FEC instances.
User logic pulses tx_fec0_slice0_din_start in the same
clock cycle as the data containing the start of codeword. In subsequent contiguous clock
cycles, the remaining codeword data must be applied until the end of the codeword is
reached. In the cycle following the end of codeword, the user logic might start a new
codeword by pulsing the tx_fec0_slice0_din_start again.
The following figure shows the case of user logic providing codewords without any gap between them. This shows maximum throughput of the FEC-only interface.
The following figure shows a case where the user logic has inserted a gap after codeword 1 before indicating the start of codeword 2. Inserting gaps allows the user logic to control the throughput. Note that the gap between codewords is optional.
The following figure shows the signaling for 50 Gb/s without any gap between codewords.
The following figure shows the signaling for 50 Gb/s with a gap between codeword 1 and codeword 2.
