Simulation can take a long time to complete due to the time required to complete
`define SIM_SPEED_UP is available to
improve simulation time by reducing the PCS lane alignment marker (AM) spacing to speed
up the time the IP will take to achieve alignment. Setting
`define SIM_SPEED_UP will change the following parameters:
SIM_SPEED_UP option can be used for simulation when in serial
loopback or if the AM spacing can be reduced at both endpoints. This option is
compatible with the example design simulation which uses serial loopback.
- Altering the value of
CTL_RX_VL_LENGTH_MINUS1_100GE_0from the default value of
CTL_RX_VL_LENGTH_MINUS1_25GE_*from the default values of
16'h4FFFwill violate the IEEE 802.3 spec.
Decreasing the AM spacing will result in less than MRMAC bandwidth being available on the link.
This change can be made only in simulation. For a design to work in hardware, the default values must be used.
Full rate simulation without the
SIM_SPEED_UPoption should still be run.
SIM_SPEED_UPis available only when running RTL simulations. The option is not available for post-synthesis or post-implementation simulations.