Important: The design must meet the following rules when connecting the Versal MRMAC Hard IP core to the transceivers:
- GTs have to be contiguous.
- For MRMAC operating in wide SerDes mode (CTL_SERDES_WIDTH_[0..3]<2> == 1), the MRMAC and connected GTYE5_QUAD instance should be placed within the same Clock Region.
- For MRMAC operating in narrow SerDes mode (CTL_SERDES_WIDTH_[0..3]<2> == 0), the MRMAC and connected GTYE5_QUAD instance should be placed either within the same Clock Region, or one horizontal Clock Regions above or below the MRMAC instance.
- MRMAC 100GE, 40GE mode should use four contiguous GTYs and 50GE should use two contiguous GTYs from the same GTYE5_QUAD.
Note: MRMAC and GTYE5_QUAD placed in horizontally opposite locations are not recommended. However for extreme cases, you can try to use them by adding pipeline registers between MRMAC an GTY to ease the timing.