OUTPUT_BATCH_STRIDE - 1.4.1 English

Vitis AI RNN User Guide (UG1563)

Document ID
UG1563
Release Date
2021-12-03
Version
1.4.1 English

The output_batch_stride register is only used by the DPURVDRML on the VCK5000 Versal development card. It describes the address step between the output of two adjacent batches stored in DDR.

Bit Register Address Type Description
31:0 OUTPUT_BATCH_STRIDE 0x68 R/W The address step between the output of two adjacent batches in DDR.