Register Space - 1.4.1 English

Vitis AI RNN User Guide (UG1563)

Document ID
UG1563
Release Date
2021-12-03
Version
1.4.1 English

The DPURADR16L on the Alveo U25 card and the DPURAHR16L on the Alveo U50LV card share the same register map. The DPURVDRML on the VCK5000 development card introduces two more registers, input_batch_stride and output_batch_stride, to describe the batching information about input and output. These kernels implement register space in the programmable logic. These registers are accessible through the AXI4-Lite interface. The following tables show these registers.