Example Design - 2.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)

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2.0 English

This chapter provides information about the example design, including a description of the files and the directory structure generated by the Xilinx® Vivado® Design Suite, the purpose and contents of the provided scripts, the contents of the example HDL wrappers, and the operation of the demonstration test bench.

The example design includes the following modules

This uses AXI Traffic Generator to initiate the NVMe™ TC IP
Command Generator
NVMe command generator
Data Generator
Payload generator for H2C interface
RX Checker
Receives and checks payload from C2H interface
Emulates QDMA registers
Doorbell Generator
Emulates QDMA axi_master interface that updates NVMe doorbell registers
HW Application
Mapper Mimic module is sample HW application that interacts with NVMe TC IP to emulate NVMe Storage (A simple BRAM at backend)
Figure 1. Core Example Design