| o_h2c_byp_out_addr[63:0] |
O |
64-bit starting address of DMA transfer |
| o_h2c_byp_out_vld |
O |
Valid |
| i_h2c_byp_out_rdy |
I |
Ready |
| o_h2c_byp_out_qid[10:0] |
O |
Queue ID |
| o_h2c_byp_out_port_id[2:0] |
O |
Port ID |
| o_h2c_byp_out_error |
O |
Indicates that an error was encountered in
descriptor fetch or execution of a previous descriptor. |
| o_h2c_byp_out_func[7:0] |
O |
PCIe function ID |
| o_h2c_byp_out_at[1:0] |
O |
Address Type
- ’b00: The address in the request is untranslated. Only
address type supported by the IP.
|
| o_h2c_byp_out_len[15:0] |
O |
The number of bytes to transfer. |
| o_h2c_byp_out_eop |
O |
Indicates end of packet. Set for the last
descriptor. Reset for the rest of the descriptors |
| o_h2c_byp_out_sop |
O |
Indicates start of packet. Set for the first
descriptor. Reset for the rest of the descriptors. |
| o_h2c_byp_out_sdi |
O |
H2C Bypass Out (which is QDMA H2C Bypass In)
Status Descriptor/Interrupt. If set, the user application signals
the QDMA to send the status descriptor to the host and to generate
an interrupt to host when the QDMA has fetched the last byte of the
data associated with this descriptor. The QDMA honors the request to
generate an interrupt only if interrupts have been enabled in the
H2C SW context for this QID and
armed
by the driver. This can only be set for an EOP descriptor. |
| o_h2c_byp_out_mrkr_req |
O |
H2C Bypass In Marker Request. When set, the
descriptor passes through the H2C Engine pipeline. Once complete, it
produces a marker response on the H2C Streaming Bypass-Out
interface. This can only be set for an EOP descriptor. |
| o_h2c_byp_out_no_dma |
O |
H2C Bypass In no DMA (Constant 1'b0) |
| o_h2c_byp_out_cidx[15:0] |
O |
The CIDX used for the status descriptor update and/or interrupt
(aggregation mode). |