IP Facts - 2.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)

Document ID
Release Date
2.0 English
LogiCORE™ IP Facts Table
Core Specifics
Supported Device Family 1 UltraScale+™ 2
Supported User Interfaces AXI4-Lite, AXI4-Stream, AXI4
Resources Performance and Resource Use web page
Provided with Core
Design Files Encrypted RTL
Example Design Verilog
Test Bench Verilog
Constraints File Xilinx Constraints File (XDC)
Simulation Model Not Provided
Supported S/W Driver 3 Linux
Tested Design Flows 4
Design Entry Vivado® Design Suite

Vivado IPI

Simulation For supported simulators, see the Xilinx Design Tools: Release Notes Guide.
Synthesis Vivado Design Suite
Release Notes and Known Issues Master Answer Record: 73241
All Vivado IP Change Logs Master Vivado IP Change Logs: 72775
Provided by Xilinx at the Xilinx Support web page
  1. For a complete list of supported devices, see the Vivado® IP catalog.
  2. QDMA only supports UltraScale+ devices.
  3. Linux: Linux OS and driver support information is available from the page.
  4. For the supported versions of the tools, see the Xilinx Design Tools: Release Notes Guide.