Software Interface - 2.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)

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The NVMe TC IP maps the admin queues of all functions to the software interface. Software can interface with the IP using the sw_s_axi interface. When a new admin queue command for any function is received, the admin queue command is written to the software queue defined by the SW_Q_ATTRIBUTE register using the ddr_m_axi interface. An interrupt is also raised if the INTR_EN [16] is enabled and the INTR_STS [16] is set. The software can then read the admin queue entries from the queue based on the write pointer information provided in the SW_Q_ATTRIBUTE [111: 96] register. Once those entries are processed, the software can update the read pointer information in the same register to inform the NVMe TC IP about the entries that have been freed.

Based on the processing of each admin command, the software can transfer some data or completion. This can be done by pushing WQEs (work instructions) to the NVMe TC through the sw_s_axi interface. The format of the WQEs is the same as defined in Table 1. The NVMe TC IP provides a FIFO-like interface to the software to post WQEs and read back completions. The depth of this FIFO is defined by the parameter C_DEPTH_SW_WQE_FIFO. This also forms the initial “credit” to the software to post WQEs. Every time a WQ entry is posted by the software, the credit is decremented by 1. The completions returned by the NVMe TC provide incremental “credits” back to the software.

Table 1. SW AXI4 (sw_s_axi) Slave Memory Map
Address Offset Field Comment
0x000 WQE entry (32B each) Any writes to this location is regarded as a WQE push into the internal software WQE FIFO irrespective of the actual location it is written to.
0x100 WQE completion entry (8B each) Any reads from this location is regarded as a pop from the internal software WQE completion FIFO. Any writes to this location is ignored.

For every work queue entry that is completed by the NVMe TC IP, a corresponding completion is provided to the software. The IP also asserts an interrupt to inform the software of new completions to be read by the software if the INTR_EN [17] is set. The WQ_CMPL_ATTRIBUTE [15:0] register can be read to know the number of Work Queue Request Completions.