DPURAHR16L (Alveo U50LV Card) - 2.0 English

Vitis AI RNN User Guide (UG1563)

Document ID
UG1563
Release Date
2022-01-20
Version
2.0 English

The DPURAHR16L is the design optimized for the Alveo U50LV data center accelerator card to utilize the high bandwidth of the HBMs. The DSP arrays are running at a double frequency of programmable logic, thus making the 16x32 systolic array on U50LV achieve a similar computation capacity to the U25 version but save half of DSP resources. Batches of seven inputs are supported on the Alveo U50LV card design as shown in the following figure.

Figure 1. DPURAHR16L Top-Level Block Diagram