The receive FLEX I/F can be used when the DCMAC Subsystem is configured for Independent MAC and PCS+FEC mode or for Coupled MAC+PCS mode. The desired mode is selected using the control field ctl_rx_independent_tsmac_and_phy_mode of the GLOBAL_MODE register. This field is configured statically when there is no data flowing through the DCMAC Subsystem.
The following table lists the configuration options for the RX path (from the SerDes interface to the FLEX interface). The configuration is set using the c0_ctl_rx_flexif_select through c5_ctl_rx_flexif_select of C0_RX_MODE_REG through C5_RX_MODE_REG registers.
|c<N>_ctl_rx_flexif_select[1:0]||Operating Mode||Application Description|
|2'b00||For PHYs that include FEC, provides direct access to the FEC sublayer
where (through separate controls) transcoding or RX alignment can be
bypassed. This mode disables the PCS descrambler function and the AM
This mode should also be set for modes using FEC transcoder bypass.
|Transparent mapping of 100GE into OTN.|
|2'b01||This mode enables the PCS descrambler function and enables the AM removal function.||Flex Ethernet PHY with no EBLOCK replacement.|
|2'b10||This mode enables the PCS descrambler function, the AM removal function, and the 66-bit sync header error replacement by EBLOCK.||Flex Ethernet PHY with EBLOCK replacement.|
|2'b11||This mode enables the PCS descrambler function, the AM removal function, the 66-bit sync header error replacement by EBLOCK, and enables the PCS receive state machine.||PCS mode with legalized 66-bit block stream.|