A number of rules govern the successful use of the channelized segmented AXI4-Stream protocol.
The 128-bit segments are ordered 0 to N; the first of the 128-bit transfers
occurs on segment 0, the second on segment 1, and so forth. During each clock cycle
that data is valid (
tvalid asserted), an idle cycle
(no data) is indicated with inactive segment 0 (
== 0). If the cycle is not a full IDLE and some data is present,
segment 0 must be active (
tuser_ena0 == 1). The
segmented bus is aligned such that the first byte of data is placed in bits 7:0 of
Data is transferred in a segment on the interface when the
tuser_ena bit is asserted. Segments
must be filled in sequence with no gaps between active segments.
Gaps Subsequent to EOP
Segments must be filled in sequence with no gaps between active
segments. However, if a segment has an
subsequent segments might be inactive. Furthermore, if the segment after the
eop is inactive, all subsequent segments in that cycle
must be inactive.
Because the DCMAC Subsystem
implements pre-indication of channel using the
id_req signals, there
must be a guaranteed correlation between those indicated signals and the response
pair wherein the two signal sets are identical but
tid are time shifted by a
fixed and static number of clocks.
The DCMAC Subsystem guarantees
correlation between valid
tid signals presented by
the transmit AXI4-Stream client and valid
ch_status_id signals presented on the
ch_status interface. In this case, however, it is not
an exact mirroring because
ch_status_vld is only
ch_status_skip_req is asserted.
Regardless, it is guaranteed that the DCMAC Subsystem will not provide channel status information any more
frequently than the channel’s
tid is presented by
the AXI4-Stream client.
The DCMAC Subsystem's channelized
AXI4-Stream bus can support up to three
sop signals per cycle; the corresponding
preambles are provided on
tx_axis_preamblein_0 is used for
signals in segments 0–3,
sop signals in segments 4–7, and
tx_axis_preamblein_4 is used for
sop signals in segments 8–11.