PCS Statistics TDM Interface - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

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2.1 English

Statistics related to the PCS ports are captured on the PCS statistics time division multiplexed (TDM) interface. For both transmit and receive, there are three signals/buses: data, start, and valid. The PCS statistics TDM interface is clocked by s_axi_aclk. There are 22 data bits in the transmit direction, and 44 in the receive direction.

Note: Reset of the AXI4-Lite interface results in a short-term disruption of the information relayed on the PCS statistics TDM interface. User logic should ignore the statistics information during this time and also should ignore the statistics information relayed during the first TDM loop following the reset.

The TDM interface streams the collective information for all six ports across cycles and splits the data bus between consecutive ports on some cycles.

The transmit information only takes two cycles to relay while the receive information requires 44 cycles. For both transmit and receive, there is a twelve-cycle idle (valid deasserted) period after the last information is relayed, until the start signal is reasserted and the information transfer begins again.

Using the RX port as an example, the following diagram shows how the PCS statistics TDM interface works.

Figure 1. PCS Statistics TDM Interface

The first cycle (clock 0) shows the start of the TDM information transfer. The data relayed corresponds to TDM Cycle Number 0 in the register description. Clock cycles 1 through 43 then continue and complete the information relay for all ports and statistics fields. After that is the twelve-cycle idle stretch with valid deasserted (clocks 44 through 55). The TDM loop then begins again with the valid and start both asserted on clock cycle 56, relaying the new information for TDM Cycle Number 0.

The TDM Cycle Numbers and the corresponding breakdown of field information that they relay is described in the Register Space.