Hardware Update Interface Ports (CBCAM only) - 2.3 English

Binary CAM Search LogiCORE IP Product Guide (PG317)

Document ID
PG317
Release Date
2022-06-08
Version
2.3 English
Table 1. Hardware Update Interface
Port Name I/O Clock Description
s_axis_hwui_tready O key_clk tready indicates that the core is ready to accept insert/delete requests. The maximum supported rate of insert/delete is approximately RAM_FREQ / 25.
s_axis_hwui_tvalid I key_clk Indicates that the insert/delete request is valid. An insert/delete is initiated when both tready and tvalid are high for one clock cycle.
s_axis_hwui_tdata[S_HWUI_WIDTH-1:0] I key_clk The update request (response, key, operation). tdata is padded with zeros to a byte multiple length. The operation code is in byte 0:

0x00 = INSERT

0x01 = UPDATE

0x02 = DELETE

0x03 = GET_BY_KEY

m_axis_hwui_tready I key_clk

tready for the hwui response channel. Tie high if the

downstream slave is always able to accept data on m_axis_hwui_tdata.
m_axis_hwui_tvalid O key_clk Indicates that the insert/delete response is valid.
m_axis_hwui_tdata[M_HWUI_WIDTH-1:0] O key_clk The update response (fill_level, status). tdata is padded with zeros to a byte multiple length. The status code is in byte 0:

0x00 = SUCCESS

0x01 = CAM_FULL

0x02 = KEY_NOT_FOUND

0x03 = DUPLICATE_KEY

0x04 = BUSY

0x05 = MASK_NOT_FOUND

0x06 = SUCCESS_BLOCKED

Figure 1. s_axis_hwui_tdata

S_HWUI_OP_POS = 0

S_HWUI_KEY_POS = 8

S_HWUI_RESP_POS = 8 + 8 x floor((KEY_WIDTH + 7) / 8)

S_HWUI_WIDTH = 8 + 8 x floor((KEY_WIDTH + 7) / 8) + 8 x floor((RESP_WIDTH + 7) / 8)

Figure 2. m_axis_hwui_tdata

M_HWUI_OP_POS = 0

M_HWUI_COUNT_POS = 8

M_HWUI_WIDTH = 8 + 16

Figure 3. Hardware Update Interface Timing Diagram