Create a Floorplan for the Reconfigurable Region - 2020.2 English

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
Release Date
2020.2 English

Each RP is required to have a Pblock to define the physical resources available for the RM. Because this Pblock is set on a RP, these restrictions and requirements apply:

  • The Pblock must contain only valid reconfigurable element types. The region may overlap other site types, but these other sites must not be included in the resize_pblock commands.
  • Multiple Pblock rectangles for each component type can be used to create the RP region, but for the greatest routability, they should be contiguous. Gaps to account for non-reconfigurable resources are permitted, but in general, the simpler the overall shape, the easier the design is to place and route.
  • If using the RESET_AFTER_RECONFIG property for 7 series devices, the Pblock height must align to clock region boundaries. See Apply Reset After Reconfiguration for more details.
  • The width and composition of the Pblock must not split interconnect columns for 7 series devices. See Creating Pblocks for 7 Series Devices for more details.
  • The resource usage of the largest RM needs to be taken into consideration when defining the Pblock in certain parts. If the largest RM exceeds the documented maximum resource counts of the target device, write_bitstream generates an error.
  • The Pblock must not overlap any other Pblock in the design.
  • Standard Pblocks for floorplanning logic within a RP are supported, as are nested Pblocks.
  • The IS_SOFT property of a reconfigurable Pblock is automatically set to FALSE, as the Pblock size and boundaries must remain fixed. Setting this property to TRUE results in an error.
  • Any nested Pblocks under the reconfigurable Pblock inherit the IS_SOFT = FALSE property; this cannot be changed.
    Table 1. Pblock Commands and Properties
    Command/Property Name Description
    create_pblock Command used to create the initial Pblock for each RP instance.
    add_cells_to_pblock Command used to specify the instances that belong to the Pblock. This is typically a level of hierarchy as defined by the bottom-up synthesis processing.
    resize_pblock Command used to define the site types (such as SLICE or RAMB36) and site locations that are owned by the Pblock.
    RESET_AFTER_RECONFIG Pblock property used to control the use of the dedicated GSR event on the reconfigurable region. Use of this property is highly recommended and, for 7 series and Zynq devices, requires clock region alignment in the vertical direction.
    CONTAIN_ROUTING Pblock property used to control the routing to prevent usage of routing resources not owned by the Pblock. This property is mandatory for PR and is set to True automatically for RPs. Static routing is still allowed to use resources inside of the Pblock.
    EXCLUDE_PLACEMENT Pblock Property used to prevent the placement of any logic, not belonging to the Pblock, inside the defined Pblock RANGE. This property is mandatory for PR and set to true automatically for RPs. Static logic can be placed inside of the RP with a specific LOC property if RESET_AFTER_RECONFIG is not used.

    Used to control the maximum number of PartPins per INT tile. Default is 5.

    Setting a lower value (i.e. 3) increases the spreading between partition pin placements. This typically eases routing congestion in areas with dense PartPin placement, but can negatively affect RP interface timing.

The following is an example of a set of constraints for a RP:

#define a new pblock
create_pblock pblock_count
#add a hierarchical module to the pblock
add_cells_to_pblock [get_pblocks pblock_count] [get_cells [list inst_count]]
#define the size and components within the pblock
resize_pblock [get_pblocks pblock_count] -add {SLICE_X136Y50:SLICE_X145Y99}
resize_pblock [get_pblocks pblock_count] -add {RAMB18_X6Y20:RAMB18_X6Y39}
resize_pblock [get_pblocks pblock_count] -add {RAMB36_X6Y10:RAMB36_X6Y19}