AI Engine/Programmable Logic Integration

Versal ACAP AI Engine Programming Environment User Guide (UG1076)

Document ID
Release Date
2020.2 English

In addition to kernels operating on the AI Engines, you can specify kernels to run in the programmable logic (PL) region of the device. PL kernels can be written in RTL or HLS C/C++. The HLS C/C++ kernel can be directly used in a graph. For RTL kernels, the RTL code is packaged into the kernel separately by the Vitis™ command tools.

  • PL kernels can be modeled as C++ functions to represent the functionality in the graph. See Model PL Kernels with C++.
  • For PL kernels written in HLS C/C++, the functions can be directly used in an input graph, provided that the HLS features are supported in the AI Engine compiler. See HLS Kernels Written in C/C++.