DDR Memory Access through GMIO - 2020.2 English

AI Engine Kernel Coding Best Practices Guide (UG1079)

Document ID
UG1079
Release Date
2021-02-04
Version
2020.2 English

The main data streams from and to the AI Engine are the AI Engine to PL streaming interface and GMIO, which is used to make external memory-mapped connections to or from the global memory. The interface between PS and AI Engine can target low throughput purposes such as, configuration. There are two types of GMIOs, the AI Engine-GMIO and PL-GMIO. The AI Engine-GMIO directly connects to the DDR memory through theAI Engine-NOC master unit (NMU). PL-GMIO uses PL-NOC NMU, but AI Engine connects to DDR memory through PL kernel, which interfaces the AI Engine through the AI Engine-to-PL streaming interface. The PL kernel that uses PL-GMIO is part of the graph, and can be controlled by ADF API together with AI Engine kernels.

The bandwidth of AI Engine GMIO is affected by the number of NMUs and DDR memory controllers used in the platform. PL-GMIO is further affected by PL kernel clock frequency and AI Engine-to-PL interface, besides the number of DDR memory controllers used in the platform and the interface from PL kernel to DDR memory.

The benefits of AI Engine GMIO include that it can directly access DDR memory, and it is not only a virtual platform for AI Engine simulator, but also can work in hardware without PL kernels. For more information about GMIO programming model, refer to the Versal ACAP AI Engine Programming Environment User Guide (UG1076).