CSU WDT - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

Document ID
UG1137
Release Date
2021-01-05
Version
2020.2 English

The CSU WDT is configured to be used by PMU firmware that if PMU firmware application hangs for some reason, then the system would restart. This functionality is enabled only when ENABLE_WDT flag is defined.

EM modules sets CSU WDT error action as ‘System Reset’ Initialization of CSU WDT depends on bringing WDT out of reset which is performed by psu_init from FSBL. FSBL writes the status of psu_init completion to PMU Global general storage register 5, so that PMU firmware can check for its completion before initializing CSU WDT. When ENABLE_WDT flag is defined during PMU firmware initialization, it adds a task to scheduler to be triggered for every 100 milli-seconds until psu_init completion status is updated by FSBL. After psu_init is completed, this task will be removed from scheduler tasks list and PMU firmware initializes CSU WDT and configures it to 90 milli-seconds. It also starts a scheduler task to restart the WDT for every 50 milli-seconds. Whenever CSU WDT error occurs due to PMU firmware code hanging, this error is handled in hardware to trigger ‘System Reset’ and the system will restart.

Following are the dependencies to use this WDT functionality:

  1. EM module needs to be enabled by defining ENABLE_EM flag.
  2. ENABLE_WDT flag needs to be defined to use CSU WDT.
  3. Scheduler module needs to be enabled by defining ENABLE_SCHEDULER to add a task to scheduler to check for psu_init completion and to restart WDT periodically.