Prerequisites - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

Document ID
UG1137
Release Date
2021-01-05
Version
2020.2 English

This document assumes that you are:

  • Experienced with embedded software development
  • Familiar with Armv7 and Armv8 architecture
  • Familiar with Xilinx development tools such as the Vivado® Integrated Design Environment (IDE), the Vitis™ unified software platform, compilers, debuggers, and operating systems.

This document includes the following chapters:

  • Programming View of Zynq UltraScale+ MPSoC Devices: Briefly explains the architecture of the Zynq UltraScale+ MPSoC hardware. Xilinx recommends you to go through and understand each feature of this chapter.
  • Development Tools: Provides a brief description about the Xilinx software development tools. This chapter helps you to understand all the available features in the software development tools. It is recommended for software developers to go through this chapter and understand the procedure involved in building and debugging software applications.
  • Software Stack: Provides a description of various software stacks such as bare metal software, RTOS-based software and the full-fledged Linux stack provided by Xilinx for developing systems with the Zynq UltraScale+ MPSoC device.
  • Software Development Flow: Walks you through the software development process. It also provides a brief description of the APIs and drivers supported in the Linux OS and bare metal.
  • Software Design Paradigms: Helps you understand different approaches to develop software on the heterogeneous processing systems. After reading this chapter, you will have a better understanding of programming in different processor modes like symmetric multi-processing (SMP), asymmetric multi-processing (AMP), virtualization, and a hybrid mode that combines SMP and AMP.
  • System Boot and Configuration: Describes the booting process using different booting devices in both secure and non-secure modes.
  • Security Features: Describes the Zynq UltraScale+ MPSoC devices features you can leverage to enhance security during application boot- and run-time.
  • Platform Management: Describes the features available to manage power consumption, and how to control the various power modes using software.
  • Platform Management Unit Firmware: Describes the features and functionality of PMU firmware developed for Zynq UltraScale+ MPSoC device.
  • Power Management Framework: Describes the functionality of the Xilinx Power Management Framework (PMF) that supports a flexible power management control through the platform management unit (PMU).
  • Reset: Explains the system and module-level resets.
  • High-Speed Bus Interfaces: Explains the configuration flow of the high-speed interface protocols.
  • Clock and Frequency Management: Briefly explains the clock and frequency management of peripherals in Zynq UltraScale+ MPSoC devices.
  • Target Development Platforms: Explains about the different development platforms available for the Zynq UltraScale+ MPSoC device, such as quick emulators (QEMU), and the Zynq UltraScale+ MPSoC boards and kits.
  • Boot Image Creation: Describes Bootgen, a standalone tool for creating a bootable image forZynq UltraScale+ MPSoC devices. Bootgen is included in the Vitis software platform.
  • Appendix A - Appendix K: Describe the available libraries and board support packages to help you develop a software platform.
  • Additional Resources and Legal Notices: Provides links to additional information that is cited throughout the document.