FPGA Manager Configuration and Usage for Zynq-7000 Devices and Zynq UltraScale+ MPSoC - 2020.2 English

1. Go to cd <plnx-proj-root>.
2. In the petalinux-config command, select FPGA Manager > [*] Fpga Manager.
   Note: PetaLinux FPGA manager configuration when selected:

   1. Generates the pl.dtsi nodes as a dt overlay (dtbo).
   2. Packs bitstreams in .bin form and dtbos to the /lib/firmware/base directory in the root file system.
   3. The BOOT.BIN generated using petalinux-package command does not have bitstream.
3. Specify extra hardware files in FPGA Manager > Specify hardware directory path.
   Note: This step is optional. It is required only if multiple bitstreams for same PS and corresponding dtbos, need to be packed into the root file system. It generates and pack bitstream in .bin form and its dtbo in the RootFS at /lib/firmware/<XSA name>. Ensure that PS design is same for XSA at hw directory path and <plnx-proj-root>/project-spec/hw-description/system<.xsa>.
4. Run petalinux-build.

Example loading full bitstream on target:

root@xilinx-zcu102-2020_1:~# fpgautil -o /lib/firmware/base/pl.dtbo -b 
/lib/firmware/base/design_1_wrapper.bit.bin

Time taken to load DTBO is 239.000000 milli seconds. DTBO loaded through ZynqMP FPGA manager successfully.

Refer to petalinux-package command for generating BOOT.BIN.

Loading a full bitstream through sysfs – loading bitstream only:

root@xilinx-zcu102-2020_1:~# fpgautil  -b /mnt/design_1_wrapper.bit.bin

Time taken to load BIN is 213.000000 milli seconds. BIN FILE loaded through zynqMP FPGA manager successfully.

See help section for more option: root@xilinx-zcu102-2020_1:~# fpgautil -h. For more information, see http://www.wiki.xilinx.com/Solution+ZynqMP+PL+Programming.

Figure 1. FPGA Manager