AI Engine IP - 2020.2 English

Versal ACAP Design Guide (UG1273)

Document ID
Release Date
2020.2 English

To generate an extensible platform for the Vitis environment, the AI Engine IP must be instantiated and connected to the rest of the design. Then, the Vitis environment must be used to generate the AI Engine configuration. The AI Engine IP lets you define the number of:

  • AXI4-Stream master and slave interfaces to and from the AI Engine and PL
  • AXI4-Stream clock ports for the PL and NoC channels
  • Memory-mapped AXI interfaces to and from the AI Engine to the NoC
  • Events being triggered and monitored both from AI Engine and the PL
Note: AI Engine IP is used only for extensible platform creation.

For more information, see the AI Engine LogiCORE IP Product Guide (PG358) and Versal ACAP AI Engine Programming Environment User Guide (UG1076).