About This Guide - 2020.2 English

Versal ACAP Design Guide (UG1273)

Document ID
UG1273
Release Date
2021-03-26
Version
2020.2 English

This guide provides a high-level overview of the Versal ACAP as follows:

System Architecture
Provides an overview of the Versal ACAP with a summary of each high-level integrated block, including the purpose of each block and how blocks are related to each other.
System Planning
Describes how each Versal device series relates to different system design types and design flows.
Design Flows
Describes the Xilinx design tools and supported design flows available for Versal ACAPs.
System Migration
Provides high-level system migration recommendations as well as block-by-block migration information for designs targeting the Versal ACAP.
Primitives
Provides information on Versal ACAP primitives.