Design Dynamic Power - 2020.2 English

Xilinx Power Estimator User Guide for Versal ACAP (UG1275)

Document ID
UG1275
Release Date
2020-12-04
Version
2020.2 English

Design dynamic represents additional power consumption from the user logic resources use and clocking, routing, switching activity, and load. Design Dynamic power is constant and does not change with changes in device temperature.