GTY - 2020.2 English

Xilinx Power Estimator User Guide for Versal ACAP (UG1275)

Document ID
UG1275
Release Date
2020-12-04
Version
2020.2 English

The Versal ACAP GTY supports continuous data rate from 1.2 Gb/s to 32.75 Gb/s. Versal GTY sheet has few differences when compared to previous device families.

  • The following Versal device Clock Sources are different:
    LCPLL
    LC-tank based VCO for low jitter, supports maximum data rates
    RPLL
    Ring-oscillator based, slightly lower power, lower data rates
Recommended: It is recommended to use Add GTY Interface or Manage IP to enter a GTY configuration for a desired protocol so that all columns are correctly specified.

Versal devices include the following changes to the GTY configuration:

Table 1. Transceiver Power Estimation (GTY)
Source UltraScale+ Device Versal Device
LC PLL QPLL (shared to 4 channels) LCPLL (shared to 2 channels)
Ring PLL CPLL RPLL
Ethernet MAC CMAC MRMAC
Debug Eyescan Not currently supported