User Input Requirements - 2020.2 English

Xilinx Power Estimator User Guide for Versal ACAP (UG1275)

Document ID
UG1275
Release Date
2020-12-04
Version
2020.2 English

Versal™ ACAP power estimation is a complex process, because it is dependent on the amount of logic in the design and the configuration of that logic. To produce accurate estimates, the power estimation process requires accurate input values, such as resource usage, clock rates, and toggle rates. To supply the minimum input that allows XPE to estimate power with reasonable accuracy, you need the following:

  • A target device-package-grade combination
  • A good estimate of resources you expect to use in the design
  • The clock frequency or frequencies for the design
  • An estimate of the data toggle rates for the design
  • The external memory and transceiver based interfaces with their data rates for the design
  • The thermal environment or solution in which the design will be operating

As a general rule, input as much information about your design as available, then leave the remaining settings to default values. This strategy allows you to determine the device power supply and heat dissipation requirements.