Memory and Registers Reserved for PLM - 2020.2 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2020-11-24
Version
2020.2 English

The following registers and memory locations are reserved for PLM:

PPU RAM of size 384 KB
Reserved for PLM for execution. This memory location is used for code, data, and BSS sections of the PLM ELF file.
PMC RAM of size 128 KB
Used for tool generated data, for authentication/decryption chunks, slave boot modes, and event logging.
PMC_GLOBAL_GLOBAL_GEN_STORAGE0, and PMC_GLOBAL_GLOBAL_GEN_STORAGE1
Registers reserved for the ROM to store the ROM execution time stamp. When the PLM is active, these two registers are read to obtain the ROM execution time.
PMC_GLOBAL_GLOBAL_GEN_STORAGE2

Contains the device security status, updated by ROM. PLM uses this register to determine if KAT needs to be performed.

PMC_GLOBAL_GLOBAL_GEN_STORAGE4

Used by PLM to store ATF handoff parameter address pointer.

PMC_GLOBAL_PERS_GLOB_GEN_STORAGE0
Reserved for XilPM to save the status of each power domain initialization.
PMC_GLOBAL_PERS_GLOB_GEN_STORAGE1
Reserved
PMC_GLOBAL_PERS_GLOB_GEN_STORAGE2
Used by XilPM to store the reset reason.