System Design Types - 2020.2 English

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID

UG1387

Release Date

2021-03-26

Version

2020.2 English

Versal™ ACAP is a heterogeneous compute platform with multiple compute engines. A wide range of applications can be mapped on Versal ACAP, including signal processing for wireless systems, machine learning inference, and video processing algorithms. In addition to multiple compute engines, Versal ACAP offers very high system bandwidth using high-speed serial I/Os, network on chip (NoC), DDR4/LPDDR4 memory controllers, and multi-rate Ethernet Media Access Controllers (MRMACs). Versal devices are categorized into the Versal Prime, Premium, and AI Core series. The following figure shows the different system design types and design flows supported for each Versal device series.

Note: The design flows for Versal Prime and Premium series are similar to the flows used with Xilinx® FPGAs. The design flow for Versal AI Core series requires that you design for a heterogeneous compute platform, which has special hardware configuration and software support requirements.

Figure 1. System Design Types

The following table shows the system design types and design flows supported for each Versal device series. As shown in the table, a majority of the design flows are based on building a platform.

Table 1. System Design Types
Design Type	Device Series	Design Flow	Platform Source	GitHub Examples
Hardware-only system	Versal Prime Series Versal Premium Series	Traditional	N/A	Versal Device Architecture Tutorials
Embedded system	Versal Prime Series Versal Premium Series	Traditional	N/A	Versal Embedded Design Tutorial
Embedded system	Versal Prime Series Versal Premium Series	Platform-based	Custom	Versal Prime Series VMK180 Targeted Reference Designs
Embedded AI Engine system	Versal AI Core series	Platform-based	Custom	AI Engine Development Design Tutorials VCK190 Base TRD

Tip: Check Xilinx GitHub for additional examples, which are updated periodically.

Following is a summary of each system design type:

Hardware-only system: programmable logic designs. Create this system using the traditional design flow.
Embedded system: embedded processing system with software running on the Arm® Cortex®-A72 and Cortex-R5F processors and hardware content in the PL. Create this system using either the traditional or platform-based design flow.
Embedded AI Engine system: embedded processing system with software running on the Arm Cortex-A72 and Cortex-R5F processors, hardware content in the PL, and algorithmic content in the AI Engine. Create this system using either the traditional or platform-based design flow.

Following is a summary of the platform sources used for each design flow:

Traditional design flow (no platform): When using the traditional design flow, a platform is not needed because acceleration is not performed. The Vitis™ embedded software is used for embedded tools, such as drivers, run time and multi-OS environments, compilers, debuggers, and profiling tools. However, the Vitis software platform is not required.
Platform-based design flow (custom platform): When using the platform-based design flow, a custom platform must be used when developing accelerated applications on the PL or AI Engine on a custom board. The Vitis software platform is required, and the XSA is built for the specific custom board.