The following CPM ports are available:
- Master AXI4 MM Ports
- Only active in CPM DMA/AXI4 Bridge use modes:
- There are two Master AXI4 MM ports at the CPM
boundary. Modes:
- DMA (XDMA, QDMA)
- May use both ports. Although not required to use both ports if the aggregated PCIe link throughput is below or equal to the NOC NMU limit for that particular device/silicon speed grade.
- AXI4 Bridge
- Only uses one port (AXI-MM0). If AXI4 Bridge is used in conjunction with DMA port, AXI4 Bridge traffic will only use AXI-MM0 while DMA traffic can use both ports.
- In Endpoint mode both of these AXI4 Masters route to the NOC directly.
- In Root Port mode (inherently AXI4 Bridge mode), one of these AXI4 Master (AXI-MM0) will route to the CCI-500 Interconnect directly. NOC can be reached via CCI-500.
- There are two Master AXI4 MM ports at the CPM
boundary. Modes:
- Slave AXI4 MM Port
- Only active in CPM DMA/AXI4 Bridge use modes:
- Only one Slave AXI4 MM port at the CPM boundary. Modes:
- All (XDMA, QDMA, AXI Bridge):
- Can be used to access the internal registers or Bus Mastering (Read/Write) to the PCIe Link.
- In both Endpoint and Root Port modes this port connects directly to the NOC.
- Only one Slave AXI4 MM port at the CPM boundary. Modes:
- Master and Slave AXI-ST Ports
- Only usable in CPM PCIe use mode.
- Used in both Endpoint and Root Port mode.
- Connects directly to the PL region.
The following PL PCIe ports are available:
- Master and Slave AXI-ST Ports
- Only usable in CPM PCIe use mode.
- Used in both Endpoint and Root Port mode.
- Connects directly to the PL region.