Data Center Application Acceleration Development Flow - 2020.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
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2020.2 English

The following diagram describes the steps needed to build and run an application for use on the Alveo Data Center accelerator cards. The steps are summarized below, and the details of each step can be found throughout this documentation.

Figure 1. Application Development Flow for Data Center Accelerator Cards
x86 Application Compilation
Compile the host application to run on the x86 processor using the G++ compiler to create a host executable file. The host program interacts with kernels in the PL region. For more information on writing the host application, refer to Developing Applications. For more information on compiling the host application, refer to Building the Host Program.
PL Kernel Compilation and Linking

PL kernels are compiled for implementation in the PL region of the target platform. PL kernels can be compiled into Xilinx object form (XO) file using the Vitis compiler (v++), Vitis HLS for C/C++ kernels, or the package_xo command for RTL kernels. For information on coding kernels, refer to C/C++ Kernels or RTL Kernels.

The Vitis compiler also links the kernel XO files with the hardware platform to create a device executable (.xclbin) for the application. For more information, refer to Building the Device Binary.

Xilinx object (XO) files are linked with the target hardware platform by the v++ --link command to create a device binary file (.xclbin) that is loaded into the Xilinx device on the target platform.

Running the Application
For Alveo Data Center accelerator cards, the .xclbin file is the required build object for running the system. When running the application, you can run software emulation, hardware emulation, or run on the actual physical accelerator platform. For more information, refer to Running the Application Hardware Build.
  • When the build target is software or hardware emulation, the Vitis compiler generates simulation models of the kernels in the device binary. As described in Build Targets, emulation targets let you build, run, and iterate the design over relatively quick cycles; debugging the application and evaluating performance.
  • When the build target is the hardware system, Vitis compiler generates the .xclbin using the Vivado Design Suite to run synthesis and implementation, and resolve timing. This process is automated to generate high quality results; however, hardware-savvy developers can fully leverage the Vivado tools in their design process.