Specifying Interfaces - 2020.2 English

As discussed previously, the type of interfaces that Vitis HLS creates depends on the data type and direction of the arguments of the top-level function, the target flow for the active solution, the default interface configuration settings, and any specified INTERFACE pragmas or directives.

The configuration settings are defined by the config_interface command. You can change the defaults defined in the configuration settings by selecting the Solution > Solution Settings menu command as described in Setting Configuration Options.

The INTERFACE pragma or directive lets you specify details for a specific function argument, or interface port, augmenting the default configuration or overriding it as needed. To specify the interface mode for arguments, open the source code editor to open the Directives view. Right-click the argument on the top-level function in the Directives view in the Vitis HLS IDE, and select Insert Directive to open the Vitis HLS Directive Editor dialog box. Select INTERFACE for the Directive as shown in the following figure.

Figure 1. Vitis HLS Directive Editor Dialog Box

The various options displayed for the INTERFACE directive change depending on the specific interface mode you select. Refer to set_directive_interface for details on the various options, or select the Help command in the Directive Editor dialog box. Following are some items of interest:

Destination

Specifies whether the INTERFACE is added as a directive to the directives.tcl script, or as a pragma to the source code. Refer to Using Directives in Scripts vs. Pragmas in Code for more information.

mode

The interface mode specifies the port control protocol used by the selected argument. Refer to Port-Level I/O Protocols for additional information on the different available port protocols.

register

If you select this option, all pass-by-value reads are performed in the first cycle of operation. For output ports, the register option guarantees the output is registered. You can apply the register option to any function in the design. For memory, FIFO, and AXI4 interfaces, the register option has no effect.

port

Specifies the selected port or argument the INTERFACE is applied to.

depth

This option specifies how many samples are provided to the design by the test bench and how many output values the test bench must store. Use whichever number is greater, the samples or output values.

Note: For cases in which a pointer is read from or written to multiple times within a single transaction, the depth option is required for C/RTL co-simulation. The depth option is not required for arrays or when using the hls::stream construct. It is only required when using pointers on the interface.

If the depth option is set too small, the C/RTL co-simulation might deadlock as follows:

• The input reads might stall waiting for data that the test bench cannot provide.
• The output writes might stall when trying to write data, because the storage is full.

offset

This option is used for AXI4 interfaces, and specifies the memory address offset for the specified argument.