When the design is functionally verified in Simulink, you can generate the dataflow graph from the design. It is
necessary to encapsulate the AI Engine blocks into a
subsystem. To understand more about creating a top-level subsystem, refer to Creating a Top-Level Subsystem Module.
Important: To generate output from the AI Engine model, only blocks from the Xilinx Model Composer AI Engine
library and a limited set of Simulink blocks can
be used in the subsystem that is instantiated at the top-level of the design. Refer
to Connecting Source and Sink Blocks for more details about the blocks that are
supported inside the subsystem.