Compiling Xilinx HDL Libraries - 2020.2 English

Model Composer and System Generator User Guide (UG1483)

Document ID
UG1483
Release Date
2020-11-18
Version
2020.2 English

The Xilinx tool that compiles libraries for use in ModelSim SE is named compile_simlib.

To compile the Xilinx HDL libraries, launch the Vivado Design Suite and then enter compile_simlib in the Vivado Tcl console.

Note: You can enter compile_simlib -help in the Vivado Tcl Console for more details on executing this Tcl command.