The orientation of the device on the PCB should first be established. Consider the location of fixed PCB components, as well as internal device resources. For example, aligning the GT interfaces on the device package to be as close to the components with which they interface on the PCB will lead to shorter PCB trace lengths and fewer PCB vias.
A sketch of the PCB including the critical interfaces can often help determine the best orientation for the device on the PCB, as well as placement of the PCB components. After completion, the rest of the device I/O interface can be planned.
High-speed interfaces such as memory can benefit from having very short and direct connections with the PCB components with which they interface. These PCB traces often have to be matched length and not use PCB vias, if possible. In these cases, the package pins closest to the edge of the device are preferred in order to keep the connections short and to avoid routing out of the large matrix of BGA pins. For more information, see PCB Guidelines for Memory Interfaces in the Versal ACAP PCB Design User Guide (UG863).
The I/O Planning view layout in the Vivado® IDE is useful in this stage for visualizing I/O connectivity relative to the physical device dimensions, showing both top-side and bottom-side views.
The following figure shows the I/O Planning view layout.