Clock - 2020.2 English

Xilinx Power Estimator User Guide (UG440)

Document ID
UG440
Release Date
2020-12-04
Version
2020.2 English

Specify the clock for the SD-FEC core. After providing these inputs, you can view the power estimation report for VCCINT rail and VCCSDFEC. On the summary sheet, VCCSDFEC rail current is also displayed under Power Supply section.