To implement the PHY in a synthesized design outside of opt_design, enter:
When you use this command, the Vivado tools implement the memory controller in the synthesized netlist without implementing the whole design. For more information, see the implement_mig_cores Tcl command in the Vivado Design Suite Tcl Command Reference Guide (UG835).
Do not run the
implement_mig_corescommand more than once on an open design. Instead, close the design, reopen it, and run the command again.