For global clock primitives (BUFG, BUFGCE, BUFGCE_DIV, BUFG_GT, BUFGCTRL), the enable/selection of clock is determined by
set_case_analysiscommand. This command guides the timing analyzer to identify the clocks across clocking logic. For example the select signal of BUFGMUX must be set using
set_case_analysisto guide the timing analyzer's clock selection. This in turn helps Report Power to estimate power using the right clock. For BUGCE block, CE input must be set using
set_case_analysisto enable or disable the clock output.