Debugging Using Vivado Simulator - 2020.2 English

Vivado Design Suite Tutorial: Logic Simulation (UG937)

Document ID
UG937
Release Date
2021-01-21
Version
2020.2 English

Vivado® simulator supports System Verilog feature. In this exercise, you will explore the System Verilog feature using the following:

  • Scope Window
  • Object Window
  • Tcl Console