Step 5: Disable the IP XDC Files - 2020.2 English

Vivado Design Suite Tutorial: Designing with IP (UG939)

Document ID
UG939
Release Date
2021-02-04
Version
2020.2 English
For this design, you disable the XDC files that are included with the Clock Wizard IP, so that you can apply the top-level timing constraints to the clk_wiz_0 module. This IP has not had the output products generated, so you will first generate the synthesis targets, which includes the XDC files.

In Project Mode, you are not required to generate output products manually. The Vivado® tools generate output products from IP automatically as needed in the design flow, including the generation of a Vivado synthesis DCP. However, because you are changing a property on the XDC files delivered with the clk_wiz IP, you must manually generate the output products to create the constraints files or files to change the property.

Also, because you are going to disable the use of an IP XDC file and provide the constraints during synthesis of the top-level design, you must disable the generation of the clk_wiz synthesis DCP (or netlist) as well.

  1. To disable the automatic generation of a synthesis design checkpoint (DCP) file add the following to your script:
    set_property generate_synth_checkpoint false [get_files clk_wiz_0.xci]
  2. Now when the design is synthesized, an out-of-context module (OOC) synthesis run is not automatically created and launched for the clk_wiz_0 IP. Instead, the clk_wiz_0 IP is synthesized as part of the top-level design.
  3. Add the generate_target command to your Tcl script:
    generate_target all [get_files clk_wiz_0.xci]

    Multiple output products can be generated by passing a list to the command, such as {synthesis instantiation_template}, or you can generate all the available output products by specifying all.

    Tip: To find out what output products an IP supports, use either the report_property command on the IP, or get_property to get the KNOWN_TARGETS property from the IP. For example (do not add these to your script):
    report_property [get_ips clk_wiz_0] 
    get_property KNOWN_TARGETS [get_ips clk_wiz_0]
  4. To disable the XDC constraints delivered with the Clock wizard, you need the names of the files. You can query the XDC files(s) that are delivered with an IP, by using the get_files command with the -of_objects and -filter options.
  5. To capture the XDC file names of the Clock Wizard IP in a Tcl variable, add the following lines to your script:
    set clk_wiz_xdc [get_files -of_objects [get_files \
    clk_wiz_0.xci] -filter {FILE_TYPE == XDC}]

    This returns the names of the XDC files that are delivered with the Clock wizard.

  6. To disable the XDC files, add this line to your script as well:
    set_property is_enabled false [get_files $clk_wiz_xdc]

    The XDC files delivered with clk_wiz IP are disabled when you run your script.

    Tip: To check what XDC files are evaluated in a project, and in what order, you can use the report_compile_order command with the -constraints option.