Step 8: Launch Synthesis and Implementation - 2020.2 English

Vivado Design Suite Tutorial: Designing with IP (UG939)

Document ID
UG939
Release Date
2021-02-04
Version
2020.2 English
The project is now ready for synthesis and implementation. The Vivado® Design Suite automatically generates the necessary output products for the various IP in your project, as needed. You do not need to manually generate the output products unless you want to make changes to the generated output products prior to using them in synthesis, simulation, or implementation.

In the Project Mode, the Vivado Design Suite manages the details of synthesis and implementation runs, using run strategies and maintains the state of the design. Therefore, you will use the launch_runs command to run synthesis and implementation in project-based designs.

  1. Add the following line to your Tcl script:
    launch_runs synth_1

    By default, a synthesis run called synth_1 is created for every project. You can also manually create new runs using the create_run command, and configure run properties using the set_property command. See the Vivado Design Suite User Guide: Design Flows Overview (UG892) for more information on creating and configuring runs.

    After the synthesis run has completed, you can launch an implementation run. However, because the implementation run is dependent on the completion of the synthesis run, you must use the wait_on_run command to hold your Tcl script until synthesis is complete.

  2. Add these two lines to your script:
    wait_on_run synth_1
    launch_runs impl_1 -to_step write_bitstream

    When the synthesis run, synth_1, completes, the implementation run, impl_1, begins. Implementation is a multi-step process that begins with netlist optimization, runs through placement and routing, and can even include generating the bitstream for the Xilinx FPGA.

    The -to_step option that you added to your Tcl script indicates that implementation should include generating the bitstream for the device. By default, implementation does not include that step. See the Vivado Design Suite User Guide: Implementation (UG904) for more information.

    Tip: Alternatively, you can use the write_bitsteam command; this requires that you open the implementation run first using the open_run command.

    Just as implementation needed to wait on synthesis to complete, wait for your Tcl script to allow implementation to complete before generating any reports, or exiting.

  3. Add the wait_on_run command to your Tcl script, to wait for the implementation run to complete:
    wait_on_run impl_1

    The script will wait until the implementation run completes before continuing.