The purpose of this design is to review the design flow process using Abstract Shell, so the details of the implementation flow and hardware operation are not extensively covered here. For a review of the Dynamic Function eXchange design flow, refer to earlier labs in this document. For details on the DFX Controller IP and hardware operation, review Lab 7 in this document.
- Extract the tutorial design archive.
- From a command shell, launch Vivado with the example design
project creation script. This must be launched from the directory where the
script is located.
vivado –mode tcl –source project_dfxc_vcu118.tcl
- When the script completes, open the Vivado IDE by typing the following:
- Check to see if IP needs to be updated. Run
A few minor revision changes, such as for ILA, might be found if using a newer version of Vivado. Please use this tutorial only with the version of Vivado that matches this document version. If updates must be made, use the default setting, which has the core container disabled, but skip the actual synthesis of the IP module – this will be done during the next step.
and update any out-of-date IP.
- In the Flow Navigator, under the IP INTEGRATOR heading, click
Generate Block Design to prepare the
design for processing. Leave the Out of context per
IP Synthesis option selected, then click Generate.
This step creates all the IP identified in the block design and launches them through synthesis. For this design, this block design covers the vast majority of the static logic representing the design infrastructure. This step does not launch out-of-context synthesis for the RTL submodules, which includes the shift and count Reconfigurable Modules.
- In the Design Runs tab, right-click on impl_1 and select
Note: Do not use from the Flow Navigator, as this will launch both the impl_1 run as well as the child_0_impl_1 run. The latter should not be implemented at this point.
. This will pull the design all the way through synthesis and
implementation for the parent run only.
- When impl_1 completes, select in the resulting dialog box.
With the routed parent design open in the Vivado IDE, you are ready to create Abstract Shells.