Tutorial Design Description - 2020.2 English

Vivado Design Suite Tutorial: Dynamic Function eXchange

Document ID
UG947
Release Date
2021-02-23
Version
2020.2 English

Designs for the tutorial labs are available as a zipped archive on the Xilinx website. Each lab in this tutorial has its own folder within the zip file. To access the tutorial design files:

  1. Download the reference design files from the Xilinx website.
  2. Extract the zip file contents to any write-accessible location.

Lab 1: 7 series Basic DFX Flow

The sample design used throughout this tutorial is called led_shift_count_7s. The design targets the following Xilinx development platforms:

  • KC705 (xc7k325t)
  • VC707 (xc7vx485t)
  • VC709 (xc7vx690t)
  • AC701 (xc7a200t)

This design is very small, which helps minimize data size and allows you to run the tutorial quickly, with minimal hardware requirements.

Lab 2: UltraScaleā„¢ Basic DFX

The sample design used throughout this tutorial is called led_shift_count_us. The design targets the following Xilinx development platforms:

  • KCU105 (xcku040)
  • VCU108 (xcvu095)
  • KCU116 (xcku5p)
  • VCU118 (xcvu9p)

Lab 3: DFX Project Flow

The sample design used throughout this tutorial is calleddfx_project. It is a modified version of the led_shift_count design used in Lab 1, modified to include two shift instances instead of one counter and one shifter. This change helps illustrate that a Partition Definition applies to all instances of a partition type. The design targets the following Xilinx development platforms:

  • KC705 (xc7k325t)
  • VC707 (xc7vx485t)
  • VC709 (xc7vx690t)
  • KCU105 (xcku040)
  • KCU116 (xcku5p)
  • VCU108 (xcvu095)
  • VCU118 (xcvu9p)

Lab 4: Vivado Debug and the DFX Project Flow

The sample design used is called dfx_project_debug. The design targets the following Xilinx development platforms:

  • KCU105 (xcku040)
  • VCU108 (xcvu095)
  • KCU116 (xcku5p)
  • VCU118 (xcvu9p)

Lab 5: DFX Controller IP for 7 series Devices

The sample design used throughout this tutorial is called dfxc_7s and is based on the design used in Lab 1. The design targets the following Xilinx development platforms:

  • KC705 (xc7k325t)
  • VC707 (xc7vx485t)
  • VC709 (xc7vx690t)

Lab 6: DFX Controller IP for UltraScale Devices

The sample design used throughout this tutorial is called dfxc_us. The design targets an xcvu095 device for use on the VCU108 demonstration board, Rev 1.0, and is based on the design used in Lab 2.

Lab 7: DFX Controller IP Tutorial Design for UltraScale+ Devices

The sample design used throughout this tutorial is called dfxc_usp and is based on the design used in DFX Controller for UltraScale Devices. The design targets the KCU116 and VCU118 demonstration boards.

Lab 8: Nested Dynamic Function eXchange

The sample design in this tutorial is another variation on the shift-count design, where you can configure the shifter or counter for all 8 LEDs, or reconfigure at a lower granularity, changing only 4 of the LEDs. This design targets the same UltraScale and UltraScale+ development platforms as Lab 4: KCU105, VCU108, KCU116, and CCU118.