Power Rail Consolidation Impacting Power - 2020.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-02-18
Version
2020.2 English

To take advantage of the power management switching of power domains, your design must keep some discrete power rails. This allows individual rails to be powered off with the power domain switching logic at the cost of using additional voltage regulators or regulator outputs. For more information, see this link in the UltraScale Architecture PCB Design User Guide (UG583).