Now you are ready to set up and launch the Questa Advanced Simulator to run post-implementation timing simulation. You will set the timing simulation properties in the Vivado IDE, and run the timing simulation
- In the Flow Navigator, right-click Simulation to select Simulation Settings. Set the timing simulation properties.
- In the Simulation Settings tab, set the Target simulator to Questa Advance Simulator.
- Click Yes to change your target
simulator to Questa Advanced Simulator.
- Set the questa.simulate.saif to power_tutorial_timing_questasim.saif.
- Set the questa.simulate.saif_scope to testbench/dut_fpga.
- Note that the
- Click OK. With the simulation settings properly configured, you can launch the Questa Advanced Simulator to perform a timing simulation of the design.
- In the Flow Navigator, click
A separate Questa Advanced Simulator GUI opens and starts simulating the design.
- After the Questa Advanced Simulator has finished simulating the
design, make sure the SAIF file requested has been generated. Check to see that
the SAIF file requested in the simulation settings prior to running simulation
appears in this directory: