Arm Cortex-R5F Processor Boot Code - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

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2021.1 English

The boot.S file contains a minimal set of code for transferring control from the processor reset location of the processor to the start of the application. The boot code performs minimum configuration which is required for an application to run starting from reset state of the processor. Below is a sequence illustrating what all configuration is performed before control reaches to main function.

  1. Program vector table base for exception handling
  2. Program stack pointer for various modes (IRQ, FIQ, supervisor, undefine, abort, system)
  3. Disable instruction cache, data cache and MPU
  4. Invalidate instruction and data cache
  5. Configure MPU with short descriptor translation table format and program base address of translation table
  6. Enable data cache, instruction cache and MPU
  7. Enable Floating point unit
  8. Transfer control to _start which clears BSS sections and jumping to main application